SPECaccel®2023 Result

Copyright 2023-2024 Standard Performance Evaluation Corporation

Supermicro

Intel Xeon Platinum 8592+

UP SuperServer SYS-521C-NR

SPECaccel 2023_base = 0.823

SPECaccel 2023_peak = 0.823

accel2023 License: 6569 Test Date: Feb-2024
Test Sponsor: Supermicro Hardware Availability: Dec-2023
Tested by: Supermicro Software Availability: Nov-2023

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: INTEL Xeon Platinum 8592+
  Max MHz.: 3900
  Nominal: 1900
Enabled: 64 cores, 1 chip, 2 threads/core
Orderable: 1 chip
Cache L1: 32 KB I + 48 KB D on chip per core
  L2: 2 MB I+D on chip per core
  L3: 320 MB I+D on chip per chip
  Other: None
Memory: 512 GB (8 x 64 GB 2Rx4 PC5-5600B-R)
Storage: 1 x 240 GB SATA III SSD
Other: None
Base Threads Run: 128
Min. Peak Threads: 128
Max. Peak Threads: 128
Accelerator
Accel Model Name: Intel Xeon Platinum 8592+
Accel Vendor: Intel
Accel Name: Intel Xeon Platinum 8592+
Type of Accel: CPU
Accel Connection: N/A
Does Accel Use ECC: Yes
Accel Description: 1 x Intel Xeon Platinum 8592+
Accel Driver: N/A
Software
OS: SUSE Linux Enterprise Server 15 SP5
Kernel 5.14.21-150500.53-default
Compiler: C/C++/Fortran: Version 2024.0.0.20231017 of Intel
oneAPI DPC++/C++
Firmware: Version 2.1 released Dec-2023
File System: xfs
System State: Run level 3 (multi-user)
Other: None
Base Parallel Model: LOP
Base Threads Run: 128
Peak Parallel Models: LOP
Max. Peak Threads: 128
Min. Peak Threads: 128

Results Table

Benchmark Base Peak
Model Seconds Ratio Seconds Ratio Seconds Ratio Model Seconds Ratio Seconds Ratio Seconds Ratio
SPEC accel2023_base 0.823
SPEC accel2023_peak 0.823
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
403.stencil LOP 1114 0.395 1114 0.395 1117 0.394 LOP 1114 0.395 1114 0.395 1117 0.394
404.lbm LOP 119 3.830 119 3.830 118 3.860 LOP 119 3.830 119 3.830 118 3.860
450.md LOP 1112 0.540 1116 0.538 1197 0.501 LOP 1112 0.540 1116 0.538 1197 0.501
452.ep LOP 490 0.847 492 0.843 491 0.845 LOP 490 0.847 492 0.843 491 0.845
453.clvrleaf LOP 1029 0.972 1027 0.974 1029 0.972 LOP 1029 0.972 1027 0.974 1029 0.972
455.seismic LOP 1138 0.685 1147 0.680 1151 0.678 LOP 1138 0.685 1147 0.680 1151 0.678
456.spF LOP 539 0.881 565 0.840 542 0.876 LOP 539 0.881 565 0.840 542 0.876
457.spC LOP 884 0.611 901 0.600 900 0.600 LOP 884 0.611 901 0.600 900 0.600
459.miniGhost LOP 1122 0.526 1122 0.526 1103 0.535 LOP 1122 0.526 1122 0.526 1103 0.535
460.ilbdc LOP 1597 0.347 1588 0.349 1598 0.347 LOP 1597 0.347 1588 0.349 1598 0.347
463.swim LOP 228 1.930 228 1.930 228 1.930 LOP 228 1.930 228 1.930 228 1.930
470.bt LOP 929 1.140 922 1.140 888 1.190 LOP 929 1.140 922 1.140 888 1.190

Operating System Notes

Stack size set to unlimited using "ulimit -s unlimited"

General Notes

Environment variables set by runaccel before the start of the run:
FORT_BUFFERED = "true"
KMP_AFFINITY = "compact,0"
KMP_BLOCKTIME = "infinite"
KMP_HW_SUBSET = "1S,64C,2T"
KMP_LIBRARY = "turnaround"
OMP_DYNAMIC = "FALSE"
OMP_NUM_THREADS = "64"
OMP_WAIT_POLICY = "active"

NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, the CVE-2017-5753 (Spectre variant 1)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
is mitigated in the system as tested and documented.

Platform Notes


 Sysinfo program /home/accel2023/bin/sysinfo
 Rev: r6622 of 2021-04-07 b1a7d5f8f71be5aff70a755cad7211a0
 running on 135-175-25 Fri Feb  9 10:18:36 2024

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : INTEL(R) XEON(R) PLATINUM 8592+
       1  "physical id"s (chips)
       128 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 64
       siblings  : 128
       physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
       25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
       53 54 55 56 57 58 59 60 61 62 63

 From lscpu from util-linux 2.37.4:
      Architecture:                    x86_64
      CPU op-mode(s):                  32-bit, 64-bit
      Address sizes:                   46 bits physical, 57 bits virtual
      Byte Order:                      Little Endian
      CPU(s):                          128
      On-line CPU(s) list:             0-127
      Vendor ID:                       GenuineIntel
      Model name:                      INTEL(R) XEON(R) PLATINUM 8592+
      CPU family:                      6
      Model:                           207
      Thread(s) per core:              2
      Core(s) per socket:              64
      Socket(s):                       1
      Stepping:                        2
      Frequency boost:                 enabled
      CPU max MHz:                     1901.0000
      CPU min MHz:                     800.0000
      BogoMIPS:                        3800.00
      Flags:                           fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
      pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
      pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology
      nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx
      smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt
      tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault
      epb cat_l3 cat_l2 cdp_l3 invpcid_single cdp_l2 ssbd mba ibrs ibpb stibp
      ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1
      hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a avx512f avx512dq rdseed adx smap
      avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt
      xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local avx_vnni
      avx512_bf16 wbnoinvd dtherm ida arat pln pts avx512vbmi umip pku ospke waitpkg
      avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq
      la57 rdpid bus_lock_detect cldemote movdiri movdir64b enqcmd fsrm md_clear serialize
      tsxldtrk pconfig arch_lbr avx512_fp16 amx_tile flush_l1d arch_capabilities
      Virtualization:                  VT-x
      L1d cache:                       3 MiB (64 instances)
      L1i cache:                       2 MiB (64 instances)
      L2 cache:                        128 MiB (64 instances)
      L3 cache:                        320 MiB (1 instance)
      NUMA node(s):                    2
      NUMA node0 CPU(s):               0-31,64-95
      NUMA node1 CPU(s):               32-63,96-127
      Vulnerability Itlb multihit:     Not affected
      Vulnerability L1tf:              Not affected
      Vulnerability Mds:               Not affected
      Vulnerability Meltdown:          Not affected
      Vulnerability Mmio stale data:   Not affected
      Vulnerability Retbleed:          Not affected
      Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via
      prctl and seccomp
      Vulnerability Spectre v1:        Mitigation; usercopy/swapgs barriers and __user
      pointer sanitization
      Vulnerability Spectre v2:        Mitigation; Enhanced IBRS, IBPB conditional, RSB
      filling, PBRSB-eIBRS SW sequence
      Vulnerability Srbds:             Not affected
      Vulnerability Tsx async abort:   Not affected

 From lscpu --cache:
      NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL   SETS PHY-LINE COHERENCY-SIZE
      L1d       48K       3M   12 Data            1     64        1             64
      L1i       32K       2M    8 Instruction     1     64        1             64
      L2         2M     128M   16 Unified         2   2048        1             64
      L3       320M     320M   20 Unified         3 262144        1             64

 /proc/cpuinfo cache data
    cache size : 327680 KB

 From numactl --hardware
 WARNING: a numactl 'node' might or might not correspond to a physical chip.
   available: 2 nodes (0-1)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
   28 29 30 31 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
   89 90 91 92 93 94 95
   node 0 size: 257638 MB
   node 0 free: 255603 MB
   node 1 cpus: 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
   57 58 59 60 61 62 63 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112
   113 114 115 116 117 118 119 120 121 122 123 124 125 126 127
   node 1 size: 257993 MB
   node 1 free: 257320 MB
   node distances:
   node   0   1
     0:  10  12
     1:  12  10

 From /proc/meminfo
    MemTotal:       528006388 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has
    performance

 From /etc/*release* /etc/*version*
    os-release:
       NAME="SLES"
       VERSION="15-SP5"
       VERSION_ID="15.5"
       PRETTY_NAME="SUSE Linux Enterprise Server 15 SP5"
       ID="sles"
       ID_LIKE="suse"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:15:sp5"

 uname -a:
    Linux 135-175-25 5.14.21-150500.53-default #1 SMP PREEMPT_DYNAMIC Wed May 10 07:56:26
    UTC 2023 (b630043) x86_64 x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2018-12207 (iTLB Multihit):                        Not affected
 CVE-2018-3620 (L1 Terminal Fault):                     Not affected
 Microarchitectural Data Sampling:                      Not affected
 CVE-2017-5754 (Meltdown):                              Not affected
 mmio_stale_data:                                       Not affected
 retbleed:                                              Not affected
 CVE-2018-3639 (Speculative Store Bypass):              Mitigation: Speculative Store
                                                        Bypass disabled via prctl and
                                                        seccomp
 CVE-2017-5753 (Spectre variant 1):                     Mitigation: usercopy/swapgs
                                                        barriers and __user pointer
                                                        sanitization
 CVE-2017-5715 (Spectre variant 2):                     Mitigation: Enhanced IBRS, IBPB:
                                                        conditional, RSB filling,
                                                        PBRSB-eIBRS: SW sequence
 CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected
 CVE-2019-11135 (TSX Asynchronous Abort):               Not affected

 run-level 3 Feb 8 16:39

 SPEC is set to: /home/accel2023
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda2      xfs   221G   38G  184G  18% /

 From /sys/devices/virtual/dmi/id
     Vendor:         Supermicro
     Product:        SYS-521C-NR
     Product Family: Family
     Serial:         1234567890

 Additional information from dmidecode 3.4 follows.  WARNING: Use caution when you
 interpret this section. The 'dmidecode' program reads system data which is "intended to
 allow hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   Memory:
     8x Micron Technology MTC40F2046S1RC56BD1 64 GB 2 rank 5600

 BIOS:
    BIOS Vendor:       American Megatrends International, LLC.
    BIOS Version:      2.1
    BIOS Date:         12/06/2023
    BIOS Revision:     5.32

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
C          | 403.stencil(base, peak) 404.lbm(base, peak) 452.ep(base, peak)
           | 457.spC(base, peak) 470.bt(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler 2024.0.0 (2024.0.0.20231017)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/intel/oneapi/compiler/2024.0/bin/compiler
Configuration file: /opt/intel/oneapi/compiler/2024.0/bin/compiler/../icx.cfg
------------------------------------------------------------------------------

==============================================================================
Fortran    | 450.md(base, peak) 455.seismic(base, peak) 456.spF(base, peak)
           | 460.ilbdc(base, peak) 463.swim(base, peak)
------------------------------------------------------------------------------
ifx (IFX) 2024.0.0 20231017
Copyright (C) 1985-2023 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C | 453.clvrleaf(base, peak) 459.miniGhost(base, peak)
------------------------------------------------------------------------------
ifx (IFX) 2024.0.0 20231017
Copyright (C) 1985-2023 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler 2024.0.0 (2024.0.0.20231017)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/intel/oneapi/compiler/2024.0/bin/compiler
Configuration file: /opt/intel/oneapi/compiler/2024.0/bin/compiler/../icx.cfg
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icx 

Fortran benchmarks:

 ifx 

Benchmarks using both Fortran and C:

 ifx   icx 

Base Portability Flags

450.md:  -80 
457.spC:  -Wl,--no-relax(icx)(*)   -mcmodel=medium   -shared-intel   -Wl,--no-relax(icx) 
459.miniGhost:  -nofor-main 

(*) Indicates a portability flag that was found in a non-portability variable.

Base Optimization Flags

C benchmarks:

 -Ofast   -O3   -xsapphirerapids   -mprefer-vector-width=512   -qopt-multiple-gather-scatter-by-shuffles   -flto   -ffast-math   -fiopenmp   -qopt-dynamic-align   -fvec-peel-loops   -qopt-streaming-stores always   -Xclang   -fopenmp-declare-target-scalar-defaultmap-firstprivate   -fimf-precision=low 

Fortran benchmarks:

 -Ofast   -O3   -xsapphirerapids   -mprefer-vector-width=512   -qopt-multiple-gather-scatter-by-shuffles   -flto   -ffast-math   -fiopenmp   -qopt-dynamic-align   -fvec-peel-loops   -qopt-streaming-stores always   -nostandard-realloc-lhs   -align array32byte   -auto   -fimf-accuracy-bits-sqrt=14   -fimf-precision=low 

Benchmarks using both Fortran and C:

 -Ofast   -O3   -xsapphirerapids   -mprefer-vector-width=512   -qopt-multiple-gather-scatter-by-shuffles   -flto   -ffast-math   -fiopenmp   -qopt-dynamic-align   -fvec-peel-loops   -qopt-streaming-stores always   -Xclang   -fopenmp-declare-target-scalar-defaultmap-firstprivate   -fimf-precision=low   -nostandard-realloc-lhs   -align array32byte   -auto   -fimf-accuracy-bits-sqrt=14 

Peak Compiler Invocation

C benchmarks:

 icx 

Fortran benchmarks:

 ifx 

Benchmarks using both Fortran and C:

 ifx   icx 

Peak Portability Flags

450.md:  -80 
457.spC:  -Wl,--no-relax(icx)(*)   -mcmodel=medium   -shared-intel   -Wl,--no-relax(icx) 
459.miniGhost:  -nofor-main 

(*) Indicates a portability flag that was found in a non-portability variable.

Peak Optimization Flags

C benchmarks:

403.stencil:  basepeak = yes 
404.lbm:  basepeak = yes 
452.ep:  basepeak = yes 
457.spC:  basepeak = yes 
470.bt:  basepeak = yes 

Fortran benchmarks:

450.md:  basepeak = yes 
455.seismic:  basepeak = yes 
456.spF:  basepeak = yes 
460.ilbdc:  basepeak = yes 
463.swim:  basepeak = yes 

Benchmarks using both Fortran and C:

453.clvrleaf:  basepeak = yes 
459.miniGhost:  basepeak = yes 

The flags files that were used to format this result can be browsed at
http://www.spec.org/accel2023/flags/Supermicro-Platform-Settings-V1.2-SPR-revG.html,
http://www.spec.org/accel2023/flags/Intel_compiler_flags.2024-03-06.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/accel2023/flags/Supermicro-Platform-Settings-V1.2-SPR-revG.xml,
http://www.spec.org/accel2023/flags/Intel_compiler_flags.2024-03-06.xml.