SPEC® CFP2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

SGI

SGI UV 2000 (Intel Xeon E5-4650, 2.7 GHz)

SPECfp®_rate2006 = Not Run

CPU2006 license: 4 Test date: May-2012
Test sponsor: SGI Hardware Availability: Jun-2012
Tested by: SGI Software Availability: May-2012
Benchmark results graph
Hardware
CPU Name: Intel Xeon E5-4650
CPU Characteristics: Intel Turbo Boost Technology disabled
CPU MHz: 2700
FPU: Integrated
CPU(s) enabled: 512 cores, 64 chips, 8 cores/chip, 2 threads/core
CPU(s) orderable: 4-256 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 20 MB I+D on chip per chip
Other Cache: None
Memory: 2 TB (256 x 8 GB 2Rx4 PC3-12800R-11, ECC)
Disk Subsystem: 2 TB tmpfs
Other Hardware: NUMAlink6 routers
Software
Operating System: SUSE Linux Enterprise Server 11 (x86_64) SP2,
Kernel 3.0.13-0.27.1-uv
Compiler: C/C++: Version 12.1.3.293 of Intel C++ Studio XE
for Linux;
Fortran: Version 12.1.3.293 of Intel Fortran
Studio XE for Linux
Auto Parallel: No
File System: tmpfs
System State: Run Level 3 (multi-user)
Base Pointers: 32/64-bit
Peak Pointers: 32/64-bit
Other Software: SGI Foundation Software 2.6,
Build 706r30.sles11sp2-1205012006
SGI Accelerate 1.4,
Build 706r30.sles11sp2-1205012006

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
410.bwaves 1020 1270 10900 1268 10900 1275 10900
416.gamess 1020 1556 12800 1557 12800 1574 12700
433.milc 1020 921 10200 921 10200 925 10100
434.zeusmp 1020 632 14700 616 15100 617 15000
435.gromacs 1020 639 11400 665 11000 655 11100
436.cactusADM 1020 825 14800 824 14800 823 14800
437.leslie3d 1020 1248 7680 1249 7670 1245 7700
444.namd 1020 713 11500 733 11200 739 11100
447.dealII 1020 481 24300 485 24100 484 24100
450.soplex 1020 984 8650 976 8720 981 8670
453.povray 1020 344 15800 334 16300 337 16100
454.calculix 1020 480 17500 483 17400 476 17700
459.GemsFDTD 1020 1432 7560 1429 7580 1423 7610
465.tonto 1020 1124 8930 1101 9120 1157 8670
470.lbm 1020 916 15300 916 15300 917 15300
481.wrf 1020 1159 9830 1555 7330 1140 10000
482.sphinx3 1020 1617 12300 1613 12300 1615 12300

Submit Notes

 The dplace mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate dplace commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

Tmpfs filesystem set up with:
  mount -t tmpfs -o remount,size=2048g,rw,mpol=interleave tmpfs /dev/shm/
  The mpol=interleave option sets the NUMA memory allocation
  policy for all files to allocate from each node in turn.
Stack size set to unlimited using "ulimit -s unlimited"
Kernel is generally available as 3.0.26-0.7.6.4317.0.PTF-default

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/dev/shm/cpu2006-1.2/libs/32:/dev/shm/cpu2006-1.2/libs/64"

 Binaries compiled on a system with 2x Xeon E5540 CPU + 32GB
 memory using SLES11 SP1
 Transparent Huge Pages disabled with:
 echo never  > /sys/kernel/mm/transparent_hugepage/enabled
 Filesystem page cache cleared with:
 echo 1>       /proc/sys/vm/drop_caches

Base Compiler Invocation

C benchmarks:

 icc -m64 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Base Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
450.soplex:  -DSPEC_CPU_LP64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 
482.sphinx3:  -DSPEC_CPU_LP64 

Base Optimization Flags

C benchmarks:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch   -auto-p32   -ansi-alias   -opt-mem-layout-trans=3 

C++ benchmarks:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch   -auto-p32   -ansi-alias   -opt-mem-layout-trans=3 

Fortran benchmarks:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch 

Benchmarks using both Fortran and C:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch   -auto-p32   -ansi-alias   -opt-mem-layout-trans=3 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20111122.html,
http://www.spec.org/cpu2006/flags/SGI-platform.20120605.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20111122.xml,
http://www.spec.org/cpu2006/flags/SGI-platform.20120605.xml.