SPEC(R) CFP2006 Summary Hewlett-Packard Company ProLiant BL420c Gen8 (1.80 GHz, Intel Xeon E5-2450L) Fri Aug 10 00:06:42 2012 CPU2006 License: 3 Test date: Aug-2012 Test sponsor: Hewlett-Packard Company Hardware availability: Jun-2012 Tested by: Hewlett-Packard Company Software availability: Feb-2012 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 410.bwaves 32 1812 240 S 16 903 241 S 410.bwaves 32 1813 240 * 16 903 241 S 410.bwaves 32 1816 239 S 16 903 241 * 416.gamess 32 1798 348 S 32 1786 351 S 416.gamess 32 1807 347 * 32 1776 353 S 416.gamess 32 1810 346 S 32 1782 352 * 433.milc 32 1056 278 S 16 529 278 S 433.milc 32 1057 278 S 16 529 278 * 433.milc 32 1056 278 * 16 529 278 S 434.zeusmp 32 744 391 S 32 744 391 S 434.zeusmp 32 726 401 S 32 726 401 S 434.zeusmp 32 727 400 * 32 727 400 * 435.gromacs 32 814 281 * 32 794 288 * 435.gromacs 32 815 280 S 32 799 286 S 435.gromacs 32 811 282 S 32 793 288 S 436.cactusADM 32 818 468 S 16 373 513 S 436.cactusADM 32 824 464 * 16 369 518 S 436.cactusADM 32 825 464 S 16 371 516 * 437.leslie3d 32 1451 207 S 16 681 221 * 437.leslie3d 32 1445 208 S 16 681 221 S 437.leslie3d 32 1449 208 * 16 681 221 S 444.namd 32 929 276 S 32 918 279 S 444.namd 32 929 276 * 32 921 279 * 444.namd 32 937 274 S 32 923 278 S 447.dealII 32 587 624 S 32 587 624 S 447.dealII 32 588 623 * 32 586 625 * 447.dealII 32 591 620 S 32 583 628 S 450.soplex 32 1235 216 S 16 551 242 S 450.soplex 32 1235 216 * 16 551 242 S 450.soplex 32 1236 216 S 16 551 242 * 453.povray 32 363 469 * 32 317 536 S 453.povray 32 363 469 S 32 314 542 S 453.povray 32 365 466 S 32 316 539 * 454.calculix 32 589 448 S 32 595 444 S 454.calculix 32 598 442 S 32 597 443 * 454.calculix 32 597 442 * 32 598 442 S 459.GemsFDTD 32 1653 205 S 16 843 201 S 459.GemsFDTD 32 1650 206 * 16 842 202 * 459.GemsFDTD 32 1649 206 S 16 842 202 S 465.tonto 32 798 395 S 32 770 409 S 465.tonto 32 799 394 S 32 776 406 S 465.tonto 32 798 394 * 32 772 408 * 470.lbm 32 1074 409 S 32 1074 409 S 470.lbm 32 1073 410 S 32 1073 410 S 470.lbm 32 1074 410 * 32 1074 410 * 481.wrf 32 1002 357 S 16 490 364 S 481.wrf 32 1001 357 S 16 491 364 * 481.wrf 32 1001 357 * 16 491 364 S 482.sphinx3 32 2314 270 S 32 2311 270 * 482.sphinx3 32 2315 269 * 32 2309 270 S 482.sphinx3 32 2316 269 S 32 2317 269 S ============================================================================== 410.bwaves 32 1813 240 * 16 903 241 * 416.gamess 32 1807 347 * 32 1782 352 * 433.milc 32 1056 278 * 16 529 278 * 434.zeusmp 32 727 400 * 32 727 400 * 435.gromacs 32 814 281 * 32 794 288 * 436.cactusADM 32 824 464 * 16 371 516 * 437.leslie3d 32 1449 208 * 16 681 221 * 444.namd 32 929 276 * 32 921 279 * 447.dealII 32 588 623 * 32 586 625 * 450.soplex 32 1235 216 * 16 551 242 * 453.povray 32 363 469 * 32 316 539 * 454.calculix 32 597 442 * 32 597 443 * 459.GemsFDTD 32 1650 206 * 16 842 202 * 465.tonto 32 798 394 * 32 772 408 * 470.lbm 32 1074 410 * 32 1074 410 * 481.wrf 32 1001 357 * 16 491 364 * 482.sphinx3 32 2315 269 * 32 2311 270 * SPECfp(R)_rate_base2006 329 SPECfp_rate2006 339 HARDWARE -------- CPU Name: Intel Xeon E5-2450L CPU Characteristics: Intel Turbo Boost Technology up to 2.30 GHz CPU MHz: 1800 FPU: Integrated CPU(s) enabled: 16 cores, 2 chips, 8 cores/chip, 2 threads/core CPU(s) orderable: 1,2 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 20 MB I+D on chip per chip Other Cache: None Memory: 96 GB (12 x 8 GB 2Rx4 PC3-12800R-11, ECC) Disk Subsystem: 2 x 146 GB SAS, RAID 0, 15000 RPM Other Hardware: None SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 6.2 (Santiago) 2.6.32-220.el6.x86_64 Compiler: C/C++: Version 12.1.2.273 of Intel C++ Studio XE for Linux; Fortran: Version 12.1.2.273 of Intel Fortran Studio XE for Linux Auto Parallel: No File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 32/64-bit Peak Pointers: 32/64-bit Other Software: None Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled Platform Notes -------------- BIOS configuration: HP Power Profile set to Maximum Performance Sysinfo program /mnt/store/cpu2006/Docs/sysinfo $Rev: 6775 $ $Date:: 2011-08-16 #$ 8787f7622badcf24e01c368b1db4377c running on bl420c-cpu Fri Aug 10 12:06:44 2012 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-2450L 0 @ 1.80GHz 2 "physical id"s (chips) 32 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 16 physical 0: cores 0 1 2 3 4 5 6 7 physical 1: cores 0 1 2 3 4 5 6 7 cache size : 20480 KB From /proc/meminfo MemTotal: 99026400 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d Red Hat Enterprise Linux Server release 6.2 (Santiago) From /etc/*release* /etc/*version* redhat-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server uname -a: Linux bl420c-cpu 2.6.32-220.el6.x86_64 #1 SMP Wed Nov 9 08:03:13 EST 2011 x86_64 x86_64 x86_64 GNU/Linux run-level 3 Aug 7 23:43 SPEC is set to: /mnt/store/cpu2006 Filesystem Type Size Used Avail Use% Mounted on /dev/sda5 ext4 191G 14G 168G 8% /mnt/store (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/smartheap/" Binaries compiled on a system with 2x E5-2470 CPU + 192 GB memory using RHEL 6.2 glibc-static-2.12-1.47.el6.x86_64.rpm and glibc-static-2.12-1.47.el6.i686.rpm are added to enable static linking runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m64 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Benchmarks using both Fortran and C: icc -m64 ifort -m64 Base Portability Flags ---------------------- 410.bwaves: -DSPEC_CPU_LP64 416.gamess: -DSPEC_CPU_LP64 433.milc: -DSPEC_CPU_LP64 434.zeusmp: -DSPEC_CPU_LP64 435.gromacs: -DSPEC_CPU_LP64 -nofor_main 436.cactusADM: -DSPEC_CPU_LP64 -nofor_main 437.leslie3d: -DSPEC_CPU_LP64 444.namd: -DSPEC_CPU_LP64 447.dealII: -DSPEC_CPU_LP64 450.soplex: -DSPEC_CPU_LP64 453.povray: -DSPEC_CPU_LP64 454.calculix: -DSPEC_CPU_LP64 -nofor_main 459.GemsFDTD: -DSPEC_CPU_LP64 465.tonto: -DSPEC_CPU_LP64 470.lbm: -DSPEC_CPU_LP64 481.wrf: -DSPEC_CPU_LP64 -DSPEC_CPU_CASE_FLAG -DSPEC_CPU_LINUX 482.sphinx3: -DSPEC_CPU_LP64 Base Optimization Flags ----------------------- C benchmarks: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 C++ benchmarks: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 Fortran benchmarks: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch Benchmarks using both Fortran and C: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 482.sphinx3: icc -m32 C++ benchmarks (except as noted below): icpc -m64 450.soplex: icpc -m32 Fortran benchmarks: ifort -m64 Benchmarks using both Fortran and C: icc -m64 ifort -m64 Peak Portability Flags ---------------------- 410.bwaves: -DSPEC_CPU_LP64 416.gamess: -DSPEC_CPU_LP64 433.milc: -DSPEC_CPU_LP64 434.zeusmp: -DSPEC_CPU_LP64 435.gromacs: -DSPEC_CPU_LP64 -nofor_main 436.cactusADM: -DSPEC_CPU_LP64 -nofor_main 437.leslie3d: -DSPEC_CPU_LP64 444.namd: -DSPEC_CPU_LP64 447.dealII: -DSPEC_CPU_LP64 453.povray: -DSPEC_CPU_LP64 454.calculix: -DSPEC_CPU_LP64 -nofor_main 459.GemsFDTD: -DSPEC_CPU_LP64 465.tonto: -DSPEC_CPU_LP64 470.lbm: -DSPEC_CPU_LP64 481.wrf: -DSPEC_CPU_LP64 -DSPEC_CPU_CASE_FLAG -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 433.milc: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -static -auto-ilp32 -opt-mem-layout-trans=3 470.lbm: basepeak = yes 482.sphinx3: -xSSE4.2 -ipo -O3 -no-prec-div -opt-mem-layout-trans=3 -unroll2 C++ benchmarks: 444.namd: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -fno-alias -auto-ilp32 447.dealII: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 450.soplex: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-malloc-options=3 453.povray: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -ansi-alias Fortran benchmarks: 410.bwaves: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -static 416.gamess: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -inline-level=0 -scalar-rep- -static 434.zeusmp: basepeak = yes 437.leslie3d: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch 459.GemsFDTD: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-malloc-options=3 465.tonto: -xAVX(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto -inline-calloc -opt-malloc-options=3 Benchmarks using both Fortran and C: 435.gromacs: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -static -auto-p32 -ansi-alias -opt-mem-layout-trans=3 436.cactusADM: -xAVX -ipo -O3 -no-prec-div -static -opt-prefetch -auto-p32 -ansi-alias -opt-mem-layout-trans=3 454.calculix: -xAVX -ipo -O3 -no-prec-div -static -auto-ilp32 -opt-mem-layout-trans=3 481.wrf: Same as 454.calculix The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.html http://www.spec.org/cpu2006/flags/HP-Platform-Flags-Intel-V1.2-A.20120829.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.xml http://www.spec.org/cpu2006/flags/HP-Platform-Flags-Intel-V1.2-A.20120829.xml SPEC and SPECfp are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Thu Jul 24 09:18:02 2014 by CPU2006 ASCII formatter v6932. Originally published on 25 September 2012.