|
Lenovo Global Technology ThinkSystem SD530 |
SPECspeed®2017_int_base = 10.3 |
|
SPECspeed®2017_int_peak = Not Run |
| CPU2017 License: | 9017 | Test Date: | Jun-2020 |
|---|---|---|---|
| Test Sponsor: | Lenovo Global Technology | Hardware Availability: | Mar-2020 |
| Tested by: | Lenovo Global Technology | Software Availability: | Apr-2020 |
Benchmark result graphs are available in the PDF report.
| Hardware | |
|---|---|
| CPU Name: | Intel Xeon Silver 4215R |
| Max MHz: | 4000 |
| Nominal: | 3200 |
| Enabled: | 16 cores, 2 chips, 2 threads/core |
| Orderable: | 1,2 chips |
| Cache L1: | 32 KB I + 32 KB D on chip per core |
| L2: | 1 MB I+D on chip per core |
| L3: | 11 MB I+D on chip per chip |
| Other: | None |
| Memory: | 192 GB (12 x 16 GB 2Rx8 PC4-2933Y-R, running at 2400) |
| Storage: | 1 x 800 GB SATA SSD |
| Other: | None |
| Software | |
|---|---|
| OS: | SUSE Linux Enterprise Server 12 SP5 (x86_64) Kernel 4.12.14-120-default |
| Compiler: | C/C++: Version 19.1.1.217 of Intel C/C++ Compiler for Linux; Fortran: Version 19.1.1.217 of Intel Fortran Compiler for Linux |
| Parallel: | Yes |
| Firmware: | Lenovo BIOS Version TEE155L 2.61 released May-2020 |
| File System: | btrfs |
| System State: | Run level 3 (multi-user) |
| Base Pointers: | 64-bit |
| Peak Pointers: | Not Applicable |
| Other: | jemalloc memory allocator V5.0.1 |
| Power Management: | BIOS set to prefer performance at the cost of additional power usage |
Results Table
| Benchmark | Base | Peak | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Threads | Seconds | Ratio | Seconds | Ratio | Seconds | Ratio | Threads | Seconds | Ratio | Seconds | Ratio | Seconds | Ratio | |
| SPECspeed®2017_int_base | 10.3 | |||||||||||||
| SPECspeed®2017_int_peak | Not Run | |||||||||||||
| Results appear in the order in which they were run. Bold underlined text indicates a median measurement. | ||||||||||||||
| 600.perlbench_s | 32 | 277 | 6.40 | 277 | 6.41 | 275 | 6.45 | |||||||
| 602.gcc_s | 32 | 437 | 9.12 | 435 | 9.15 | 435 | 9.14 | |||||||
| 605.mcf_s | 32 | 265 | 17.8 | 266 | 17.7 | 264 | 17.9 | |||||||
| 620.omnetpp_s | 32 | 270 | 6.03 | 270 | 6.03 | 265 | 6.15 | |||||||
| 623.xalancbmk_s | 32 | 104 | 13.6 | 103 | 13.7 | 103 | 13.7 | |||||||
| 625.x264_s | 32 | 115 | 15.4 | 116 | 15.2 | 115 | 15.4 | |||||||
| 631.deepsjeng_s | 32 | 245 | 5.85 | 245 | 5.84 | 245 | 5.84 | |||||||
| 641.leela_s | 32 | 351 | 4.86 | 348 | 4.90 | 348 | 4.90 | |||||||
| 648.exchange2_s | 32 | 174 | 16.9 | 174 | 16.9 | 174 | 16.9 | |||||||
| 657.xz_s | 32 | 301 | 20.6 | 301 | 20.5 | 301 | 20.5 | |||||||
Compiler Notes
The inconsistent Compiler version information under Compiler Version section is due to a discrepancy in Intel Compiler. The correct version of C/C++ compiler is: Version 19.1.1.217 Build 20200306 Compiler for Linux The correct version of Fortran compiler is: Version 19.1.1.217 Build 20200306 Compiler for Linux
Operating System Notes
Stack size set to unlimited using "ulimit -s unlimited"
Environment Variables Notes
Environment variables set by runcpu before the start of the run:
KMP_AFFINITY = "granularity=fine,scatter"
LD_LIBRARY_PATH =
"/home/cpu2017-1.1.0-ic19.1.1/lib/intel64:/home/cpu2017-1.1.0-ic19.1.1/j
e5.0.1-64"
MALLOC_CONF = "retain:true"
OMP_STACKSIZE = "192M"
General Notes
Binaries compiled on a system with 1x Intel Core i9-7980XE CPU + 64GB RAM memory using Redhat Enterprise Linux 8.0 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases
Platform Notes
BIOS configuration:
Choose Operating Mode set to Maximum Performance and then set it to Custom Mode
Stale AtoS set to Disable
CPU P-state Control set to Cooperative
C-States set to Legacy
C1 Enhanced Mode set to Enable
Sysinfo program /home/cpu2017-1.1.0-ic19.1.1/bin/sysinfo
Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011
running on linux-4xwo Fri Jun 12 09:41:43 2020
SUT (System Under Test) info as seen by some common utilities.
For more information on this section, see
https://www.spec.org/cpu2017/Docs/config.html#sysinfo
From /proc/cpuinfo
model name : Intel(R) Xeon(R) Silver 4215R CPU @ 3.20GHz
2 "physical id"s (chips)
32 "processors"
cores, siblings (Caution: counting these is hw and system dependent. The following
excerpts from /proc/cpuinfo might not be reliable. Use with caution.)
cpu cores : 8
siblings : 16
physical 0: cores 0 1 2 3 4 5 6 7
physical 1: cores 0 1 2 3 4 5 6 7
From lscpu:
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
Address sizes: 46 bits physical, 48 bits virtual
CPU(s): 32
On-line CPU(s) list: 0-31
Thread(s) per core: 2
Core(s) per socket: 8
Socket(s): 2
NUMA node(s): 2
Vendor ID: GenuineIntel
CPU family: 6
Model: 85
Model name: Intel(R) Xeon(R) Silver 4215R CPU @ 3.20GHz
Stepping: 7
CPU MHz: 3200.000
CPU max MHz: 4000.0000
CPU min MHz: 1000.0000
BogoMIPS: 6400.00
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 1024K
L3 cache: 11264K
NUMA node0 CPU(s): 0-7,16-23
NUMA node1 CPU(s): 8-15,24-31
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid
aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16
xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave
avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3
invpcid_single intel_ppin ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi
flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm
cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd
avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total
cqm_mbm_local dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku
ospke avx512_vnni md_clear flush_l1d arch_capabilities
/proc/cpuinfo cache data
cache size : 11264 KB
From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a
physical chip.
available: 2 nodes (0-1)
node 0 cpus: 0 1 2 3 4 5 6 7 16 17 18 19 20 21 22 23
node 0 size: 96346 MB
node 0 free: 92649 MB
node 1 cpus: 8 9 10 11 12 13 14 15 24 25 26 27 28 29 30 31
node 1 size: 96764 MB
node 1 free: 96507 MB
node distances:
node 0 1
0: 10 21
1: 21 10
From /proc/meminfo
MemTotal: 197745596 kB
HugePages_Total: 0
Hugepagesize: 2048 kB
From /etc/*release* /etc/*version*
SuSE-release:
SUSE Linux Enterprise Server 12 (x86_64)
VERSION = 12
PATCHLEVEL = 5
# This file is deprecated and will be removed in a future service pack or release.
# Please check /etc/os-release for details about this release.
os-release:
NAME="SLES"
VERSION="12-SP5"
VERSION_ID="12.5"
PRETTY_NAME="SUSE Linux Enterprise Server 12 SP5"
ID="sles"
ANSI_COLOR="0;32"
CPE_NAME="cpe:/o:suse:sles:12:sp5"
uname -a:
Linux linux-4xwo 4.12.14-120-default #1 SMP Thu Nov 7 16:39:09 UTC 2019 (fd9dc36)
x86_64 x86_64 x86_64 GNU/Linux
Kernel self-reported vulnerability status:
itlb_multihit: KVM: Mitigation: Split huge pages
CVE-2018-3620 (L1 Terminal Fault): Not affected
Microarchitectural Data Sampling: Not affected
CVE-2017-5754 (Meltdown): Not affected
CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled
via prctl and seccomp
CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs barriers and __user
pointer sanitization
CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: conditional,
RSB filling
tsx_async_abort: Mitigation: Clear CPU buffers; SMT vulnerable
run-level 3 Jun 12 09:41
SPEC is set to: /home/cpu2017-1.1.0-ic19.1.1
Filesystem Type Size Used Avail Use% Mounted on
/dev/sda3 btrfs 744G 49G 694G 7% /home
From /sys/devices/virtual/dmi/id
BIOS: Lenovo -[TEE155L-2.61]- 05/20/2020
Vendor: Lenovo
Product: THINKSYSTEM SD530 -[7X2104Z000]-
Product Family: ThinkSystem
Serial: 1234567890
Additional information from dmidecode follows. WARNING: Use caution when you interpret
this section. The 'dmidecode' program reads system data which is "intended to allow
hardware to be accurately determined", but the intent may not be met, as there are
frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
Memory:
4x NO DIMM NO DIMM
12x SK Hynix HMA82GR7CJR8N-WM 16 GB 2 rank 2933, configured at 2400
(End of data from sysinfo program)
This system support 8 DIMMs per processor, total 16 DIMMs.
12 DIMM slots installed with 16 GB DIMM for this run,
and running at 2400 due to CPU limitation.
Compiler Version Notes
==============================================================================
C | 600.perlbench_s(base) 602.gcc_s(base) 605.mcf_s(base)
| 625.x264_s(base) 657.xz_s(base)
------------------------------------------------------------------------------
Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1
NextGen Build 20200304
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------
==============================================================================
C++ | 620.omnetpp_s(base) 623.xalancbmk_s(base) 631.deepsjeng_s(base)
| 641.leela_s(base)
------------------------------------------------------------------------------
Intel(R) C++ Compiler for applications running on Intel(R) 64, Version 2021.1
NextGen Build 20200304
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------
==============================================================================
Fortran | 648.exchange2_s(base)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
64, Version 19.1.1.217 Build 20200306
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------
Base Portability Flags
| 600.perlbench_s: | -DSPEC_LP64 -DSPEC_LINUX_X64 |
| 602.gcc_s: | -DSPEC_LP64 |
| 605.mcf_s: | -DSPEC_LP64 |
| 620.omnetpp_s: | -DSPEC_LP64 |
| 623.xalancbmk_s: | -DSPEC_LP64 -DSPEC_LINUX |
| 625.x264_s: | -DSPEC_LP64 |
| 631.deepsjeng_s: | -DSPEC_LP64 |
| 641.leela_s: | -DSPEC_LP64 |
| 648.exchange2_s: | -DSPEC_LP64 |
| 657.xz_s: | -DSPEC_LP64 |
Base Optimization Flags
C benchmarks:
C++ benchmarks:
Fortran benchmarks:
| -m64 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -mbranches-within-32B-boundaries |