SPEC CPU(R)2017 Integer Speed Result Tyrone Systems Tyrone Camarero DS400E1U-224R4 (2.10 GHz,Intel Xeon Gold 6252) Test Sponsor: Netweb Pte Ltd CPU2017 License: 006042 Test date: Feb-2021 Test sponsor: Netweb Pte Ltd Hardware availability: Aug-2020 Tested by: Tyrone Systems Software availability: Dec-2020 Base Base Base Peak Peak Peak Benchmarks Threads Run Time Ratio Threads Run Time Ratio --------------- ------- --------- --------- ------- --------- --------- 600.perlbench_s 96 279 6.36 * 96 236 7.51 S 600.perlbench_s 96 279 6.37 S 96 238 7.47 S 600.perlbench_s 96 279 6.36 S 96 237 7.48 * 602.gcc_s 96 402 9.91 * 96 387 10.3 * 602.gcc_s 96 402 9.90 S 96 389 10.2 S 602.gcc_s 96 393 10.1 S 96 382 10.4 S 605.mcf_s 96 266 17.7 * 96 266 17.7 * 605.mcf_s 96 266 17.8 S 96 266 17.8 S 605.mcf_s 96 268 17.6 S 96 268 17.6 S 620.omnetpp_s 96 155 10.5 S 96 155 10.5 S 620.omnetpp_s 96 163 10.0 S 96 163 10.0 S 620.omnetpp_s 96 157 10.4 * 96 157 10.4 * 623.xalancbmk_s 96 110 12.9 * 96 110 12.9 * 623.xalancbmk_s 96 109 13.0 S 96 109 13.0 S 623.xalancbmk_s 96 111 12.8 S 96 111 12.8 S 625.x264_s 96 116 15.3 S 96 112 15.7 S 625.x264_s 96 116 15.2 S 96 112 15.8 S 625.x264_s 96 116 15.2 * 96 112 15.8 * 631.deepsjeng_s 96 261 5.48 * 96 261 5.48 * 631.deepsjeng_s 96 262 5.48 S 96 262 5.48 S 631.deepsjeng_s 96 261 5.49 S 96 261 5.49 S 641.leela_s 96 376 4.54 * 96 376 4.54 * 641.leela_s 96 377 4.53 S 96 377 4.53 S 641.leela_s 96 376 4.54 S 96 376 4.54 S 648.exchange2_s 96 188 15.6 * 96 188 15.6 * 648.exchange2_s 96 188 15.7 S 96 188 15.7 S 648.exchange2_s 96 188 15.6 S 96 188 15.6 S 657.xz_s 96 267 23.1 S 96 267 23.1 S 657.xz_s 96 270 22.9 S 96 270 22.9 S 657.xz_s 96 269 23.0 * 96 269 23.0 * ================================================================================= 600.perlbench_s 96 279 6.36 * 96 237 7.48 * 602.gcc_s 96 402 9.91 * 96 387 10.3 * 605.mcf_s 96 266 17.7 * 96 266 17.7 * 620.omnetpp_s 96 157 10.4 * 96 157 10.4 * 623.xalancbmk_s 96 110 12.9 * 96 110 12.9 * 625.x264_s 96 116 15.2 * 96 112 15.8 * 631.deepsjeng_s 96 261 5.48 * 96 261 5.48 * 641.leela_s 96 376 4.54 * 96 376 4.54 * 648.exchange2_s 96 188 15.6 * 96 188 15.6 * 657.xz_s 96 269 23.0 * 96 269 23.0 * SPECspeed(R)2017_int_base 10.7 SPECspeed(R)2017_int_peak 11.0 HARDWARE -------- CPU Name: Intel Xeon Gold 6252 Max MHz: 3700 Nominal: 2100 Enabled: 48 cores, 2 chips, 2 threads/core Orderable: 1,2 (chip)s Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 35.75 MB I+D on chip per chip Other: None Memory: 384 GB (12 x 32 GB 2Rx4 PC4-2933Y-R) Storage: 1 x 480 GB SATA SSD Other: None SOFTWARE -------- OS: CentOS Linux release 8.3.2011 4.18.0-240.el8.x86_64 Compiler: C/C++: Version 19.1.1.217 of Intel C/C++ Compiler for Linux Build 20200306; Fortran: Version 19.1.1.217 of Intel Fortran Compiler for Linux Build 20200306; Parallel: Yes Firmware: Version 3.4 released Oct-2020 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: jemalloc memory allocator V5.0.1 Power Management: BIOS set to prefer performance at the cost of additional power usage Compiler Notes -------------- The inconsistent Compiler version information under Compiler Version section is due to a discrepancy in Intel Compiler. The correct version of C/C++ compiler is: Version 19.1.1.217 Build 20200306 Compiler for Linux The correct version of Fortran compiler is: Version 19.1.1.217 Build 20200306 Compiler for Linux Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: KMP_AFFINITY = "granularity=fine,scatter" LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-64" MALLOC_CONF = "retain:true" OMP_STACKSIZE = "192M" General Notes ------------- Binaries compiled on a system with 2x Intel Cascade Lake CPU 4214R + 384GB RAM memory using Centos 8.2 x86_64 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the Centos 8.2 x86_64, and the system compiler gcc 8.3.1 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases. Platform Notes -------------- BIOS Settings: Power Technology = Custom Power Performance Tuning = BIOS Controls EPB ENERGY_PERF_BIAS_CFG mode = Extreme Performance SNC = Enable Stale AtoS = Disable IMC Interleaving = 1-way Interleave Patrol Scrub = Disable Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6538 of 2020-09-24 e8664e66d2d7080afeaa89d4b38e2f1c running on spec Thu Feb 18 10:05:55 2021 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6252 CPU @ 2.10GHz 2 "physical id"s (chips) 96 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 24 siblings : 48 physical 0: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 16 17 18 19 20 21 25 26 27 28 29 physical 1: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 16 17 18 19 20 21 25 26 27 28 29 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 2 Core(s) per socket: 24 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6252 CPU @ 2.10GHz Stepping: 7 CPU MHz: 2956.943 CPU max MHz: 3700.0000 CPU min MHz: 1000.0000 BogoMIPS: 4200.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 36608K NUMA node0 CPU(s): 0-23,48-71 NUMA node1 CPU(s): 24-47,72-95 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts pku ospke avx512_vnni md_clear flush_l1d arch_capabilities /proc/cpuinfo cache data cache size : 36608 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 node 0 size: 177651 MB node 0 free: 161003 MB node 1 cpus: 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 node 1 size: 180636 MB node 1 free: 164224 MB node distances: node 0 1 0: 10 21 1: 21 10 From /proc/meminfo MemTotal: 394855904 kB HugePages_Total: 0 Hugepagesize: 2048 kB /sbin/tuned-adm active Current active profile: throughput-performance /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has performance From /etc/*release* /etc/*version* centos-release: CentOS Linux release 8.3.2011 centos-release-upstream: Derived from Red Hat Enterprise Linux 8.3 os-release: NAME="CentOS Linux" VERSION="8" ID="centos" ID_LIKE="rhel fedora" VERSION_ID="8" PLATFORM_ID="platform:el8" PRETTY_NAME="CentOS Linux 8" ANSI_COLOR="0;31" redhat-release: CentOS Linux release 8.3.2011 system-release: CentOS Linux release 8.3.2011 system-release-cpe: cpe:/o:centos:centos:8 uname -a: Linux spec 4.18.0-240.el8.x86_64 #1 SMP Fri Sep 25 19:48:47 UTC 2020 x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-12207 (iTLB Multihit): KVM: Mitigation: Split huge pages CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs barriers and __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: conditional, RSB filling CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected CVE-2019-11135 (TSX Asynchronous Abort): Mitigation: TSX disabled run-level 3 Feb 16 11:45 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/mapper/cl-home xfs 372G 154G 218G 42% /home From /sys/devices/virtual/dmi/id Vendor: Tyrone Systems Product: Tyrone Camarero DS400E1 Serial: S263875X9527668 Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 12x NO DIMM NO DIMM 12x Samsung M393A4K40CB2-CVF 32 GB 2 rank 2933, configured at 2934 BIOS: BIOS Vendor: American Megatrends Inc. BIOS Version: 3.4 BIOS Date: 10/30/2020 BIOS Revision: 5.14 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 600.perlbench_s(base) 602.gcc_s(base, peak) 605.mcf_s(base, peak) | 625.x264_s(base, peak) 657.xz_s(base, peak) ------------------------------------------------------------------------------ Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 600.perlbench_s(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 600.perlbench_s(base) 602.gcc_s(base, peak) 605.mcf_s(base, peak) | 625.x264_s(base, peak) 657.xz_s(base, peak) ------------------------------------------------------------------------------ Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 600.perlbench_s(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 620.omnetpp_s(base, peak) 623.xalancbmk_s(base, peak) | 631.deepsjeng_s(base, peak) 641.leela_s(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 648.exchange2_s(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Base Portability Flags ---------------------- 600.perlbench_s: -DSPEC_LP64 -DSPEC_LINUX_X64 602.gcc_s: -DSPEC_LP64 605.mcf_s: -DSPEC_LP64 620.omnetpp_s: -DSPEC_LP64 623.xalancbmk_s: -DSPEC_LP64 -DSPEC_LINUX 625.x264_s: -DSPEC_LP64 631.deepsjeng_s: -DSPEC_LP64 641.leela_s: -DSPEC_LP64 648.exchange2_s: -DSPEC_LP64 657.xz_s: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -m64 -qnextgen -std=c11 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -xCORE-AVX512 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -fuse-ld=gold -qopt-mem-layout-trans=4 -fopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -m64 -qnextgen -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -xCORE-AVX512 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -fuse-ld=gold -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2020.1.217/linux/compiler/lib/intel64_lin -lqkmalloc Fortran benchmarks: -m64 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -mbranches-within-32B-boundaries Peak Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Peak Portability Flags ---------------------- 600.perlbench_s: -DSPEC_LP64 -DSPEC_LINUX_X64 602.gcc_s: -DSPEC_LP64(*) -DSPEC_LP64 605.mcf_s: -DSPEC_LP64 620.omnetpp_s: -DSPEC_LP64 623.xalancbmk_s: -DSPEC_LP64 -DSPEC_LINUX 625.x264_s: -DSPEC_LP64 631.deepsjeng_s: -DSPEC_LP64 641.leela_s: -DSPEC_LP64 648.exchange2_s: -DSPEC_LP64 657.xz_s: -DSPEC_LP64 (*) Indicates portability flags found in non-portability variables Peak Optimization Flags ----------------------- C benchmarks: 600.perlbench_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -fno-strict-overflow -mbranches-within-32B-boundaries -L/usr/local/je5.0.1-64/lib -ljemalloc 602.gcc_s: -m64 -qnextgen -std=c11 -fuse-ld=gold -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fprofile-generate(pass 1) -fprofile-use=default.profdata(pass 2) -xCORE-AVX512 -flto -Ofast(pass 1) -O3 -ffast-math -qopt-mem-layout-trans=4 -L/usr/local/je5.0.1-64/lib -ljemalloc 605.mcf_s: basepeak = yes 625.x264_s: -m64 -qnextgen -std=c11 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -xCORE-AVX512 -flto -O3 -ffast-math -fuse-ld=gold -qopt-mem-layout-trans=4 -fno-alias -L/usr/local/je5.0.1-64/lib -ljemalloc 657.xz_s: basepeak = yes C++ benchmarks: 620.omnetpp_s: basepeak = yes 623.xalancbmk_s: basepeak = yes 631.deepsjeng_s: basepeak = yes 641.leela_s: basepeak = yes Fortran benchmarks: 648.exchange2_s: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.1u1-official-linux64_revA.html http://www.spec.org/cpu2017/flags/Tyrone-Platform-Settings-V1.2-CLX-revB.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.1u1-official-linux64_revA.xml http://www.spec.org/cpu2017/flags/Tyrone-Platform-Settings-V1.2-CLX-revB.xml SPEC CPU and SPECspeed are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2021 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.5 on 2021-02-17 23:35:54-0500. Report generated on 2021-03-16 15:27:11 by CPU2017 text formatter v6255. Originally published on 2021-03-16.