729.abc_r
Sequential Logic Synthesis and Formal Verification
ABC is primarily written by Alan Mischenko <alanmi [at] berkeley [dot] edu>, who also submitted it to the SPEC CPU v8 Benchmark Search Program.
ABC is a software system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. ABC combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay technology mapping for Look-Up Tables (LUTs) and standard cells based on Directed Acyclic Graphs (DAGs), and innovative algorithms for sequential synthesis and verification.
The goal of the ABC project is to provide a public-domain implementation of the state-of-the-art combinational and sequential synthesis algorithms and, at the same time, create an open-source environment in which such applications can be developed and compared. The version of ABC snapshotted for SPEC CPU can optimize/map/retime industrial gate-level designs with 100K gates and 10K sequential elements for optimal delay and heuristically minimized area in about one minute of CPU time on a modern computer in 2023.
Input files consist of a script that is read in by the ABC binary. The scripts contain commands that specify logic synthesis problems to solve. Some commands are standalone, and others require a logic circuit file to be read in. Two types of logic files are used:
Given below are descriptions of the commands used in this benchmark. A more comprehensive listing of all the commands can be found at the ABC Command Summary page.
The input scripts string these commands together to create typical logic synthesis flows. We pass the -v switch to all the commands which allow it, to increase the verbosity of the output for debugging purposes.
The logic circuit files come from the EPFL Benchmarks and Titan Benchmarks, two well-known sets of real-world CAD inputs. These are representative of large-scale FPGA architecture and CAD research, and widely used today as vehicles for new algorithm development. We chose the files which fit within the size requirements for refrate and refspeed sizes, while there are others in the Titan set which run much longer and have a much larger memory footprint. A savvy user could craft their own inputs to ABC by downloading other .aig and .blif input files, and changing the input scripts to use other synthesis commands.
ABC Documentation is available at people.eecs.berkeley.edu/~alanmi/abc. Additionally, there is a tutorial slidedeck: abc_tutorial.pdf.
Many input scripts write out the circuit file at the end of the run; others just print out statistics of circuit delay values or element properties. These outputs is verified against a set of expected outputs to ensure exact matches; no tolerance is provided.
C++, C
Both SPECrate and SPECspeed versions are single-threaded. The SPECspeed version utilizes larger input circuits which consume more memory.
ABC source code makes extensive use of zero-length arrays as the last element of a struct to indicate a variable-length object. This does not conform to the ISO standards, but it is an entrenched user practice which has become a popular language extension. As of this writing, each compiler that 729.abc_r was tested on did support ZLA's in C and C++.
If a compiler is encountered that does not support zero length arrays, the symbol SPEC_ZLA can be set to the null string, thereby converting 729.abc_r code such as this to a flexible array:
struct Tru_One_t_
{
int Handle; // support
int Next; // next one in the table
word pTruth[SPEC_ZLA]; // truth table
};
As noted in the GCC description of zero-length arrays, ISO C99 flexible array members are written as contents[] without the 0. To use this option, you would add this to your SPEC CPU config file:
729.abc_r,829.abc_s:
PORTABILITY = -DSPEC_ZLA
Note that any public use of results with this portability option would require approval, as mentioned in the rules.
Incidentally, there are calls to rand() inside the source code; but none of these are exercised by the benchmark workloads. Be aware of this if you make your own workloads that use directives beyond the ones listed above.
Note that only the SPEC CPU ABC workloads have been tested and confirmed to work on big-endian platforms. Other ABC workloads have not been tested for big-endian compatibility
The ABC software is available in the berkeley-abc github repository: github.com/berkeley-abc/abc.
The SPEC CPU benchmark started with commit hash a603186 from that repository on August 11, 2023.
ABC source is distributed under the BSD License. ABC also comes bundled with the following source directories with their own licenses:
Data inputs: the Titan blif files are distributed under the MIT License, and the EPFL aig files are distributed under the MIT License.
Copyright © 2026 Standard Performance Evaluation Corporation (SPEC®)