SPEChpc™ 2021 Tiny Result

Copyright 2021-2025 Standard Performance Evaluation Corporation

Intel

Hatch: Intel Server D50DNP1SB (Xeon Platinum
8480+)

SPEChpc 2021_tny_base = 21.90

SPEChpc 2021_tny_peak = 24.30
hpc2021 License: 13 Test Date: Apr-2025
Test Sponsor: Intel Hardware Availability: Jan-2023
Tested by: Intel Software Availability: Jun-2025

Benchmark result graphs are available in the PDF report.

Results Table

Benchmark Base Peak
Model Ranks Thrds/Rnk Seconds Ratio Seconds Ratio Seconds Ratio Model Ranks Thrds/Rnk Seconds Ratio Seconds Ratio Seconds Ratio
SPEChpc 2021_tny_base 21.90
SPEChpc 2021_tny_peak 24.30
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
505.lbm_t TGT 2 56 46.3 48.60 44.3 50.80 44.4 50.70 TGT 2 56 42.0 53.6 42.1 53.4 42.1 53.4
513.soma_t TGT 2 56 68.9 53.70 69.0 53.60 69.2 53.50 TGT 2 56 68.6 54.0 68.4 54.1 68.9 53.7
518.tealeaf_t TGT 2 56 1410 11.70 1390 11.80 1400 11.80 TGT 2 56 1060 15.6 1060 15.6 1060 15.5
519.clvleaf_t TGT 2 56 87.5 18.90 89.2 18.50 88.2 18.70 TGT 2 56 88.7 18.6 87.0 19.0 87.3 18.9
521.miniswp_t TGT 2 56 89.2 17.90 89.2 17.90 89.5 17.90 TGT 2 56 61.3 26.1 61.0 26.2 61.0 26.2
528.pot3d_t TGT 2 56 1370 15.50 1350 15.80 1360 15.70 TGT 2 56 1320 16.2 1320 16.1 1320 16.0
532.sph_exa_t TGT 2 56 2090 9.35 2080 9.37 2090 9.33 TGT 2 56 1870 10.4 1870 10.4 1870 10.4
534.hpgmgfv_t TGT 2 56 82.2 14.30 82.9 14.20 82.4 14.30 TGT 2 56 77.4 15.2 78.8 14.9 77.2 15.2
535.weather_t TGT 2 56 61.2 52.70 62.5 51.60 61.4 52.50 TGT 2 56 61.2 52.7 62.5 51.6 61.4 52.5
Hardware Summary
Type of System: Homogenous Cluster
Compute Node: Intel Server D50DNP1SB (Xeon Platinum 8480+)
Interconnect: Mellanox HDR
Compute Nodes Used: 1
Total Chips: 2
Total Cores: 112
Total Threads: 224
Total Memory: 1 TB
Total Accelerators: 1
Max. Peak Threads: 56
Software Summary
Compiler: Intel oneAPI Compiler 2025.2.0
MPI Library: Intel MPI Library 2021.15 for Linux OS
Other MPI Info: None
Other Software: None
Base Parallel Model: TGT
Base Ranks Run: 2
Base Threads Run: 56
Peak Parallel Models: TGT
Minimum Peak Ranks: 2
Maximum Peak Ranks: 2
Max. Peak Threads: 56
Min. Peak Threads: 56

Node Description: Intel Server D50DNP1SB (Xeon Platinum 8480+)

Hardware
Number of nodes: 1
Uses of the node: Compute
Vendor: Intel
Model: Intel Server D50DNP1SB (2 x Intel Xeon
Platinum 8480+, 2.0GHz)
CPU Name: Intel Xeon Platinum 8480+
CPU(s) orderable: 1, 2 chips
Chips enabled: 2
Cores enabled: 112
Cores per chip: 56
Threads per core: 2
CPU Characteristics: Turbo Boost Technology up to 3.8 GHz
CPU MHz: 2000
Primary Cache: 32 KB I + 48 KB D on chip per core
Secondary Cache: 2 MB I+D on chip per core
L3 Cache: 105 MB I+D on chip per chip
Other Cache: None
Memory: 1 TB (16x64 GB DDR5 2Rx4 PC5-4800B-R)
Disk Subsystem: 1 x 1 1TB NVMe M.2 INTEL SSDPELKX010T8
Other Hardware: None
Accel Count: 1
Accel Model: Intel Data Center GPU Max 1550
Accel Vendor: Intel
Accel Type: GPU
Accel Connection: PCIe Gen5 x16
Accel ECC enabled: yes
Accel Description: Intel Data Center GPU Max 1550
Adapter: Mellanox ConnectX-6 HDR
Number of Adapters: 1
Slot Type: PCI-Express 4.0 x16
Data Rate: 200Gbit/s
Ports Used: 1
Interconnect Type: Mellanox HDR
Software
Accelerator Driver: 25.05.32567
Adapter: Mellanox ConnectX-6 HDR
Adapter Firmware: 20.38.1900
Operating System: SUSE Linux Enterprise Server 15 SP6
6.4.0-150600.23.42-default
Local File System: lustre
Shared File System: LUSTRE FS
System State: Run level 5
Other Software: None

Interconnect Description: Mellanox HDR

Hardware
Vendor: Mellanox
Model: Mellanox HDR
Switch Model: Mellanox Technologies MT28908 Family
InfiniBand Switch
Number of Switches: 12
Number of Ports: 40
Data Rate: 200 Gbit/s
Firmware: 20.38.1900
Topology: Fat-tree
Primary Use: MPI Traffic, LustreFS traffic
Software

Submit Notes

The config file option 'submit' was used.

General Notes

Environment variables set by runhpc before the start of the run:
LIBOMPTARGET_LEVEL_ZERO_USE_IMMEDIATE_COMMAND_LIST = "all"
KMP_AFFINITY=compact,1,granularity=thread
I_MPI_FABRICS=shm:ofi
I_MPI_OFFLOAD=1
I_MPI_OFFLOAD_CELL=tile
I_MPI_OFFLOAD_TOPOLIB=level_zero
I_MPI_OFFLOAD_CELL_LIST=0,1,2,3,4,5,6,7
For the following tests src.alt was used in PEAK:
513 518 519 521 528 532 534

Platform Notes

 Device Vendor                                   Intel
 Device Version                                  OpenCL 3.0 NEO
 Driver Version                                  25.05.32567
 Base clock                                      900MHz
 Max clock frequency                             1600MHz
 Tiles                                           2
 Slices per Tile                                 1
 Max compute units per Tile                      512
 Sub-slices per slice                            64
 EUs per sub-slice                               8
 Threads per EU                                  8
 Max work item dimensions                        3
 Max work item sizes                             1024x1024x1024
 Max work group size                             1024
 Preferred work group size multiple              32
 Max sub-groups per work group                   64
 Sub-group sizes                                 16, 32
 L1 Cache per EU                                 65536
 L2 cache size                                   427819008
 Global memory size                              137438953472
 Address bits                                    64, Little-Endian

Compiler Version Notes

==============================================================================
 CXXC 532.sph_exa_t(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler 2025.2.0 (2025.x.0.20250326)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir:
  /lfs/lfs17/mknyazev/intel/nightly/20250326/compiler/latest/bin/compiler
Configuration file:
  /lfs/lfs17/mknyazev/intel/nightly/20250326/compiler/latest/bin/compiler/../icpx.cfg
------------------------------------------------------------------------------

==============================================================================
 CC  505.lbm_t(base, peak) 513.soma_t(base, peak) 518.tealeaf_t(base, peak)
      521.miniswp_t(base, peak) 534.hpgmgfv_t(base, peak)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler 2025.2.0 (2025.x.0.20250326)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir:
  /lfs/lfs17/mknyazev/intel/nightly/20250326/compiler/latest/bin/compiler
Configuration file:
  /lfs/lfs17/mknyazev/intel/nightly/20250326/compiler/latest/bin/compiler/../icx.cfg
------------------------------------------------------------------------------

==============================================================================
 FC  519.clvleaf_t(base, peak) 535.weather_t(base, peak)
------------------------------------------------------------------------------
ifx (IFX) dev.x.0 Mainline 20250326
Copyright (C) 1985-2025 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 FC  528.pot3d_t(base, peak)
------------------------------------------------------------------------------
ifx: command line warning #10157: ignoring option '-W'; argument is of wrong
  type
ifx (IFX) dev.x.0 Mainline 20250326
Copyright (C) 1985-2025 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 mpiicc -cc=icx 

C++ benchmarks:

 mpiicpc -cxx=icpx 

Fortran benchmarks:

 mpiifort -fc=ifx 

Base Portability Flags

505.lbm_t:  -DUSE_MPI 
513.soma_t:  -DUSE_MPI   -DSPEC_NO_VAR_ARRAY_REDUCE 
518.tealeaf_t:  -DUSE_MPI 
519.clvleaf_t:  -DUSE_MPI 
528.pot3d_t:  -DUSE_MPI 
535.weather_t:  -DUSE_MPI 

Base Optimization Flags

C benchmarks:

 -O3   -xCORE-AVX512   -flto   -mprefer-vector-width=512   -ffast-math   -fiopenmp   -fopenmp-targets=spir64_gen   -ftarget-register-alloc-mode=pvc:auto   -Xopenmp-target-backend '-device pvc -revision_id 0x2f'   -DSPEC_COLLAPSE   -DSPEC_ACCEL_AWARE_MPI   -fopenmp-optimistic-collapse 

C++ benchmarks:

 -O3   -xCORE-AVX512   -flto   -mprefer-vector-width=512   -ffast-math   -fiopenmp   -fopenmp-targets=spir64_gen   -ftarget-register-alloc-mode=pvc:auto   -Xopenmp-target-backend '-device pvc -revision_id 0x2f'   -DSPEC_COLLAPSE   -DSPEC_ACCEL_AWARE_MPI 

Fortran benchmarks:

 -DSPEC_COLLAPSE   -O3   -xCORE-AVX512   -DSPEC_ACCEL_AWARE_MPI   -flto   -mprefer-vector-width=512   -ffast-math   -fiopenmp   -fopenmp-targets=spir64_gen   -ftarget-register-alloc-mode=pvc:auto   -Xopenmp-target-backend '-device pvc -revision_id 0x2f'   -fopenmp-target-loopopt 

Base Other Flags

Fortran benchmarks:

528.pot3d_t:  -Wno-incompatible-function-pointer-types 

Peak Compiler Invocation

C benchmarks:

 mpiicc -cc=icx 

C++ benchmarks:

 mpiicpc -cxx=icpx 

Fortran benchmarks:

 mpiifort -fc=ifx 

Peak Portability Flags

505.lbm_t:  -DUSE_MPI 
513.soma_t:  -DUSE_MPI   -DSPEC_NO_VAR_ARRAY_REDUCE 
518.tealeaf_t:  -DUSE_MPI 
519.clvleaf_t:  -DUSE_MPI 
528.pot3d_t:  -DUSE_MPI 
535.weather_t:  -DUSE_MPI 

Peak Optimization Flags

C benchmarks:

505.lbm_t:  -O3   -xCORE-AVX512   -flto   -mprefer-vector-width=512   -ffast-math   -fiopenmp   -fopenmp-targets=spir64_gen   -ftarget-register-alloc-mode=pvc:large   -Xopenmp-target-backend '-device pvc -revision_id 0x2f'   -DSPEC_COLLAPSE   -DSPEC_ACCEL_AWARE_MPI   -fopenmp-optimistic-collapse 
513.soma_t:  -O3   -xCORE-AVX512   -flto   -mprefer-vector-width=512   -ffast-math   -fiopenmp   -fopenmp-targets=spir64_gen   -ftarget-register-alloc-mode=pvc:auto   -Xopenmp-target-backend '-device pvc -revision_id 0x2f'   -DSPEC_COLLAPSE   -DSPEC_ACCEL_AWARE_MPI   -fopenmp-optimistic-collapse 
518.tealeaf_t:  -O3   -xCORE-AVX512   -flto   -mprefer-vector-width=512   -ffast-math   -fiopenmp   -fopenmp-targets=spir64_gen   -ftarget-register-alloc-mode=pvc:auto   -Xopenmp-target-backend '-device pvc -revision_id 0x2f'   -DSPEC_COLLAPSE   -DSPEC_ACCEL_AWARE_MPI   -fopenmp-target-loop-stride=global-size   -fopenmp-optimistic-collapse 
521.miniswp_t:  Same as 513.soma_t 
534.hpgmgfv_t:  Same as 513.soma_t 

C++ benchmarks:

 -O3   -xCORE-AVX512   -flto   -mprefer-vector-width=512   -ffast-math   -fiopenmp   -fopenmp-targets=spir64_gen   -ftarget-register-alloc-mode=pvc:auto   -Xopenmp-target-backend '-device pvc -revision_id 0x2f'   -DSPEC_COLLAPSE   -DSPEC_ACCEL_AWARE_MPI 

Fortran benchmarks:

519.clvleaf_t:  -DSPEC_COLLAPSE   -O3   -xCORE-AVX512   -DSPEC_ACCEL_AWARE_MPI   -flto   -mprefer-vector-width=512   -ffast-math   -fiopenmp   -fopenmp-targets=spir64_gen   -ftarget-register-alloc-mode=pvc:auto   -Xopenmp-target-backend '-device pvc -revision_id 0x2f'   -fopenmp-target-loopopt 
528.pot3d_t:  Same as 519.clvleaf_t 
535.weather_t:  basepeak = yes 

Peak Other Flags

Fortran benchmarks:

528.pot3d_t:  -Wno-incompatible-function-pointer-types 

The flags file that was used to format this result can be browsed at
http://www.spec.org/hpc2021/flags/Intel_compiler_flags.2025-05-22.html.

You can also download the XML flags source by saving the following link:
http://www.spec.org/hpc2021/flags/Intel_compiler_flags.2025-05-22.xml.

SPEChpc is a trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders.

For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org
Copyright 2021-2025 Standard Performance Evaluation Corporation
Tested with SPEChpc2021 v1.1.9 on 2025-04-21 20:44:03-0400.
Report generated on 2025-05-27 16:43:11 by SPEC hpc2021 HTML formatter v112.
Originally published on 2025-05-21.