SPEC Seal of Reviewal OMPL2001 Result
Copyright © 1999-2002 Standard Performance Evaluation Corporation
Hewlett-Packard Company
HP Integrity Superdome 64-way (1500 MHz Itanium 2)
SPECompLpeak2001 = 303161       
SPECompLbase2001 = 289967       
SPEC license # HPG2116 Tested by: Hewlett-Packard Company Test site: Richardson, Texas Test date: Dec-2003 Hardware Avail: Oct-2003 Software Avail: Jan-2004
Benchmark Reference
Time		 Base
Runtime		 Base
Ratio		 Peak
Runtime		 Peak
Ratio		 Graph Scale
311.wupwise_l 9200 358    411437        358    411437        311.wupwise_l base result bar (411437)
311.wupwise_l peak result bar (411437)
313.swim_l 12500 470    425590        470    425590        313.swim_l base result bar (425590)
313.swim_l peak result bar (425590)
315.mgrid_l 13500 953    226699        953    226699        315.mgrid_l base result bar (226699)
315.mgrid_l peak result bar (226699)
317.applu_l 13500 585    369069        541    398926        317.applu_l base result bar (369069)
317.applu_l peak result bar (398926)
321.equake_l 13000 2738     75965       2738     75965       321.equake_l base result bar (75965)
321.equake_l peak result bar (75965)
325.apsi_l 10500 616    272725        461    364508        325.apsi_l base result bar (272725)
325.apsi_l peak result bar (364508)
327.gafort_l 11000 618    284664        618    284664        327.gafort_l base result bar (284664)
327.gafort_l peak result bar (284664)
329.fma3d_l 23500 1294     290562        1294     290562        329.fma3d_l base result bar (290562)
329.fma3d_l peak result bar (290562)
331.art_l 25000 693    577270        671    596390        331.art_l base result bar (577270)
331.art_l peak result bar (596390)
SPECompLbase2001 289967         
  SPECompLpeak2001 303161         

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: HP Integrity Superdome 64-way (1500 MHz Itanium 2)
CPU: Intel Itanium 2
CPU MHz: 1500
FPU: Integrated
CPU(s) enabled: 64
CPU(s) orderable: 6 to 64 by 2
Primary Cache: L1 Inst/Data: 16 KB, associativity = 4
Secondary Cache: L2 Unified: 256 KB, associativity = 8
L3 Cache: L3 Unified: 6144 KB, associativity = 24
Other Cache: None
Memory: 256GB (512 * 512MB DIMMs)
Disk Subsystem: root disk 1x36 SCSI
9x36GB Fibrechannel (striped)
Other Hardware: --
Software
OpenMP Threads: 64
Parallel: OpenMP
Operating System: HPUX11i-TCOE B.11.23
Compiler: HP C/ANSI C Compiler C.05.55
HP aC++ Compiler C.05.55
HP Fortran 90 Compiler B.11.23.03
HP LIBF90 PHSS_29620
HP F90 Compiler PHSS_29663
HPUX OS Patch PHKL_30089
File System: vxfs
System State: Multi-user
Notes / Tuning Information 
  User environment:
     MP_IDLE_THREADS_WAIT=-1
     OMP_FIRST_USE=0
 
  Base:
     F90  +Ofaster +DSitanium2 +Oopenmp   
          +Oinfo +DD64 -minshared  
     cc   +Ofaster +Oopenmp +DD64 +Oinfo +DSitanium2
          -minshared -AOe +Ofltacc=default
    submit = chatr -s +id disable +pd 64k +pi 64k $commandexe;  \
         _M_ARENA_OPTS=64:32 _M_SBA_OPTS=16348:150:256 \
            mpsched -T FILL $command 
  
  Peak:
    311.wupwise_l: basepeak=true

    313.swim_l:  basepeak=true
 
    315.mgrid_l:  basepeak=true
 
    317.applu_l:  +Ofaster +DSitanium2  +Oopenmp +Oinfo 
      +DD64 -minshared
      ONESTEP=true
      submit = chatr -s +id enable $commandexe; 
          _M_ARENA_OPTS=64:32 mpsched -T FILL $command
 
    321.equake_l:  basepeak=true
 
    325.apsi_l: +Ofaster +DSitanium2 +Oopenmp +Oinfo +DD64 -minshared
        submit = chatr -s +id disable  +pd 256k +pi 256k $commandexe;  _
        M_ARENA_OPTS=64:32 mpsched -T FILL $command

    327.gafort_l: basepeak=true
 
    329.fma3d_l: basepeak=true
 
    331.art_l:  +Ofaster +Oopenmp +DD64 +Oinfo +DSitanium2
         -minshared -AOe +Ofltacc=default
      submit = chatr -s +id disable  +pd 256k +pi 256k  $commandexe; 
         _M_ARENA_OPTS=64:32  _M_SBA_OPTS=16348:150:256 mpsched -T FILL $command

 Alternate Sources:  
   None
 
  Kernel Paramters (/stand/system):
     maxdsiz         0xc0000000
     maxdsiz_64bit   0x3ffbfffffff
     maxssiz         0x17f00000
     maxssiz_64bit   0x40000000
     maxtsiz         0x40000000
     maxtsiz_64bit   0x40000000
     vps_pagesize    4096
     vps_ceiling     16384
     dbc_min_pct     20
     dbc_max_pct     20
     swapmem_on      0
 
Notes:

  System was configured with 1/2 of memory interleaved and
    1/2 of memory local to each cell

  System configured as a single partiton with 16 cells and 
    4 processors per cell

  Threads were assigned to cpus using the FILL strategy
    from the HP-UX mpsched utility

  Memory tuning is documented in man page malloc(3C)
    _M_ARENA_OPTS=64:32
      64 malloc arenas, 32 4k pages expansion
    _M_SBA_OPTS=16348:150:256
      16384 maxfast size, 150 small blocks, 256 grain size

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Copyright © 1999-2002 Standard Performance Evaluation Corporation
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