SPEC Seal of Reviewal OMPM2001 Result
Copyright © 1999-2007 Standard Performance Evaluation Corporation
Advanced Micro Devices
Tyan Thunder n6550W (S2915) (Opteron(TM) 2222 SE)
SPECompMpeak2001 = 13627      
SPECompMbase2001 = 13275      
SPEC license # HPG0017 Tested by: AMD Test site: Austin TX Test date: Mar-2007 Hardware Avail: May-2007 Software Avail: Oct-2006
Benchmark Reference
Time		 Base
Runtime		 Base
Ratio		 Peak
Runtime		 Peak
Ratio		 Graph Scale
310.wupwise_m 6000 323    18579       311    19309       310.wupwise_m base result bar (18579)
310.wupwise_m peak result bar (19309)
312.swim_m 6000 523    11475       479    12525       312.swim_m base result bar (11475)
312.swim_m peak result bar (12525)
314.mgrid_m 7300 561    13009       554    13179       314.mgrid_m base result bar (13009)
314.mgrid_m peak result bar (13179)
316.applu_m 4000 406    9856      381    10509       316.applu_m base result bar (9856)
316.applu_m peak result bar (10509)
318.galgel_m 5100 345    14780       345    14780       318.galgel_m base result bar (14780)
318.galgel_m peak result bar (14780)
320.equake_m 2600 197    13191       190    13676       320.equake_m base result bar (13191)
320.equake_m peak result bar (13676)
324.apsi_m 3400 237    14375       230    14812       324.apsi_m base result bar (14375)
324.apsi_m peak result bar (14812)
326.gafort_m 8700 656    13259       656    13256       326.gafort_m base result bar (13259)
326.gafort_m peak result bar (13256)
328.fma3d_m 4600 483    9528      483    9528      328.fma3d_m base result bar (9528)
328.fma3d_m peak result bar (9528)
330.art_m 6400 185    34609       185    34609       330.art_m base result bar (34609)
330.art_m peak result bar (34609)
332.ammp_m 7000 1039     6735      1020     6863      332.ammp_m base result bar (6735)
332.ammp_m peak result bar (6863)
SPECompMbase2001 13275        
  SPECompMpeak2001 13627        

Hardware
Hardware Vendor: Advanced Micro Devices
Model Name: Tyan Thunder n6550W (S2915) (Opteron(TM) 2222 SE)
CPU: Opteron(TM) Processor 2222 SE
CPU MHz: 3000
FPU: Integrated
CPU(s) enabled: 4 cores, 2 chips, 2 cores/chip
CPU(s) orderable: 1,2 chips
Primary Cache: 64KBI + 64KBD on chip
Secondary Cache: 1024KB (I+D) on chip
L3 Cache: None
Other Cache: None
Memory: 8x1GB, PC2-5300R CL4
Disk Subsystem: 250GB 7200 rpm SATA
Other Hardware: None
Software
OpenMP Threads: 4
Parallel: OpenMP
Operating System: SLES9 SP3 64bit
Compiler: QLogic PathScale Compiler Suite ver. 2.5
File System: Linux/ext3
System State: Multi-User
Notes / Tuning Information 
 Extra art Base Flags
   330.art_m (extra): -DINTS_PER_CACHELINE=16 -DDBLS_PER_CACHELINE=8

 Base tuning:
   C       : pathcc  -mp -Ofast -mcmodel=medium
   Fortran : pathf90 -mp -Ofast -OPT:early_mp=on -mcmodel=medium
   ONESTEP=yes 
    310.wupwise_m: -mp -Ofast -msse3 -LNO:prefetch_ahead=5:prefetch=3 
                -OPT:unroll_times_max=8:unroll_size=128:IEEE_NaN_Inf=off:ro=3 
                -IPA:linear=on:plimit=50000:callee_limit=5000 -INLINE:aggressive=on
    312.swim_m: -mp -O3 -OPT:Ofast -m3dnow -mcmodel=medium -LNO:simd=0
    314.mgrid_m: -mp -Ofast -CG:gcm=off:cflow=off -LNO:fusion=2:prefetch=0 -msse3
                 -OPT:early_mp=on:unroll_times_max=8:unroll_size=256:ro=3 
                 -mcmodel=medium
    316.applu_m: -mp -Ofast -mcmodel=medium -CG:local_fwd_sched=on 
                 -LNO:fusion=2:fission=2:full_unroll_size=10000:prefetch=3 
                 -TENV:X=3 
    318.galgel_m: basepeak=yes
    320.equake_m: -Ofast -mp -OPT:alias=disjoint
    324.apsi_m: -mp -O3 -OPT:Ofast -TENV:x=4 -LNO:fusion=2:prefetch=0
    326.gafort_m: -Ofast -OPT:early_mp=on -mp -LNO:vintr=0
    328.fma3d_m: basepeak=yes
    330.art_m: basepeak=yes
    332.ammp_m: -mp -O3 -OPT:alias=disjoint:unroll_times_max=8:Ofast:ro=3 
                -fno-math-errno -TENV:X=4 -LNO:prefetch=0
                use_submit_for_speed=1
                submit= PSC_OMP_GUIDED_CHUNK_MAX=700 $command
 
 
 Portablility flags:
  318.galgel_m    : -fixedform -col80
 
 Alternate Source:      
      310.wupwise_m     : Approved srcalt ompl.32 used for peak
      312.swim_m        : Approved srcalt ompl.32 used for peak
      314.mgrid_m       : Approved srcalt ompl    used for peak
      316.mgrid_m       : Approved srcalt ompl    used for peak
      320.equake_m      : Approved srcalt ompl.32 used for peak
      324.apsi_m        : Approved srcalt ompl    used for peak
 Base and Peak User Environment (bash):
   export OMP_NUM_THREADS=4 
   export OMP_DYNAMIC=FALSE
   export PSC_OMP_AFFINITY=TRUE
   export PSC_OMP_STATIC_FAIR=TRUE
   export PSC_OMP_THREAD_SPIN=1000000000
   ulimit -s unlimited
   
 Default BIOS settings used, with DRAM bank interleave set to auto
 For flag definitions see AMD-20070424-psc25_flags.txt

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